Alarm network is the way it works is very simple and the production is not too complicated, simple. From his name is known that this alarm will work when the light is detected. With these functions in the network can be used as a burglar alarm or alarm open closet / drawers should be closed.
Light Alarm System
Alarm is dikatifkan when the sensor light that comes on the status of certain evidence. Setting clear standards – can be dimmed by adjusting potentiometer R12. This system has two advantages that come with time delay alarm activation, regulation buzzer sounds and a detector batteries.
Network alarm light used as energy sources for 9V batteries can be taken to carry, but not impossible to be the source of energy from a 12V power supply. Network in Figure 1 is part of a complete range of light alarm. In Figure 1 is a network of active alarm delay when the button SW1 on ‘ON’-kan / in the press.
With the existence of this network will allow users to put the alarm in a closet / drawer before the alarm is active. Network in a network formed from C1, R1, R2, Q1 and D1. At the time of the SW1 button will overload the capacitor C1 through R1 until the voltage to the user base of close to 0 volts. This will cause transistor Q1 will be active and forcing the voltage at pin 1 IC 1A will be high.
IC 1 is an inverter gate with schimtt trigger sebanya 6 pieces. IC in a CMOS IC that suplainya maximum voltage is 18 volts so the current supply voltage (9 V from the battery or 12V from an external power supply) can still work well.
IC1 pin 1 on the condition that this will lead to whatever high voltage generated by the voltage distribution of R3, R12 and R11 (LDR) does not change is close to 5 volts.
A few seconds after the load capacitor has a full base voltage of Q1 is enough to make the Q1 to turn OFF until the voltage on pin 1 is really controlled by the voltage division between R3, R12 (potentiometer) and R11 (LDR).
So when Q1 ON, the voltage at IC1 pin 1 point would still hold about 5 volts and the voltage division between R3, R11, and R12 will be ignored. Conversely when Q1 OFF the voltage on IC1 pin 1 point will be determined by the voltage division between the three detainees. Therefore, when Q1 ON so any light condition (bright / dim) will not affect the system so that the buzzer will always OFF. If the required time delay is longer then the value of capacitor C1 can be replaced by a slightly greater. The greater the value of capacitor C1 will cause the delay activity of the system will be longer.
Network Schmitt Trigger and Trigger Schimtt BuzzerRangkaian timer and timer Buzzer
Network at the front in figure 2 is a logic circuit to determine the state of the light from a dark light. With the use of an inverter with Schmitt trigger to prevent unwanted trigger.
LDR is a component that has characteristics in which the high resistance when not exposed to light, but the resistance will drop dramatically when the LDR exposed to light. LDR, the decrease of the resistance is also affected by the intensity of light coming into the LDR, the higher the intensity of light so the lower the resistance value.
When Q1 OFF, and in dark conditions, the voltage at IC1 pin 1 will be generated from the distribution of tension between R3, R11 and R12 to produce high voltage, high enough to be considered by the gate logic inverter.
While on the contrary when the light condition, the voltage at pin 1 will be quite low due to the resistance of LDR is down dramatically. This voltage value varies based on the light-redupnya light into LDR. This condition can cause the trigger repeatedly so as to avoid triggers, such as was used by Schmitt trigger gate, the gate of the inverter system is used. Selection policy is as cheap and in a package are six gates.
The output of the inverter IC1a have to be logical and direct diumpakan buzzer. However, in figure 2, in front of IC1a added network that serves to regulate the way / the old sound of the buzzer. When the output of the gate IC1a high through R4 and C4 (LPF filter) will be men-drive IC1b to be low and causing the output capacitor C6 and unloading. This will cause the voltage at pin 5 IC1C be low for some time interval (for a capacitor C8 Dec-charge) and provide high output to the base of transistor Q2. Active transistor Q2 will cause the buzzer goes.
A moment later (after the Dec-charge capacitor C8) capacitor C8 will make refilling and then the voltage at pin 5 IC1c will rise again from the low output at the base of transistor Q2, buzzer off. Be an active set of the old buzzer Dec-time charge – charge capacitor C8 and R6.
Low Battery Detector Network
But if you want buzzer forever remain active until the jumper JP3 OFF SW1 to be connected. JP3 is connected to force the input voltage pin 3 IC1b be low until the buzzer will sound continuously while LDR is not exposed to light again. Buzzer will die setalh SW1 OFF button. Conversely when the JP3 jumper is not connected so buzzer will sound when the LDR is exposed to light. After the LDR is exposed to light, the buzzer will not sound.
This system is designed to use power supply from the batteries and therefore should be made to dketahui detector batteries for use when the batteries are already eligible for these to be replaced. Battery voltage is low terlau can cause false alarms in the system interprets the light-dark light. In addition to the buzzer sounds with a more ketch and weak.
As in figure 3, the battery detector is built of a series of D7 and R10. When the battery voltage (VCC) above 4.3 volts, the leakage current is still there to R10 and is sufficient to cause tension in the pin 9 IC1d high. This will cause the oscillator which is formed of a series of IC1e, R9, C8, C5, and R8 is not working so that a voltage at pin 13 IC1f high. This will cause Q2 OFF, and only depends on the IC1c.
Complete Network Alarm Cahay
On the other hand when the battery voltage is below 4.3 volts voltage, no leakage current until the voltage on the R10 to pin 9 is close to 0 volts and is regarded as logic low. This condition causes the active oscillator so pin 13 IC1f will get the pulse-pulse from the oscillator so that Q2 will be active as well. Pulse-pulse generated by IC1f Q2 will turn even IC1c also active.
This state will hear the sounds blend with a higher frequency when the buzzer sounds to get enough light system.
LDR sensitivity settings
LDR sensitivity setting set by potentiometer R11. At default settings, position the potentiometer into the middle. Then put the light in place to detect and set the potentiometer to make a sound when get a light and sound when the system does not get light.
Pengatikfan buzzer duration determined by the C6 and R6, for a longer period is recommended to replace the capacitor with a higher value.
For larger buzzer, which require greater flow of transistor Q2 can be replaced with a Darlington transistor collector curr
ent is greater. Look at current consumption and the ability of current buzzer that could be missed by the collector on the transistor Q2.